1. Field of the Invention
The present invention relates to a plasma display panel, and more particularly to a plasma display panel having increased fluorescent substance application area, lower discharge initiation voltage between first display electrodes and address electrodes, and improved emission efficiency.
2. Description of the Related Art
A plasma display panel (PDP) is used in a plasma display device, which is one of the generally known types of flat display devices, and has two opposite substrates and discharge gas injected into a discharge space defined between the substrates. As gas discharge is performed, plasma is created and generates UV rays, which excite fluorescent substances and cause them to emit visible rays so that images can be realized. PDPs may be classified into DC-type, AC-type, and hybrid-type panels according to their structure and driving principle. In addition, PDPs may be classified into surface discharge-type and opposite discharge-type panels according to their discharge structure. Currently, AC-type three-pole surface-discharge plasma panels are widely used.
Conventional PDPs generally include a front substrate, a rear substrate opposing the front substrate, and electrodes for initiating discharge.
The front substrate is typically made of glass, for example, transparent soda glass, with a thickness of about 2.8 mm and transmits visible rays which are created by fluorescent substances. The front substrate has a pair of first display (Y) electrodes and second display (X) electrodes positioned on its lower surface so that sustain discharge can occur. The transparent electrodes are made of indium tin oxide (ITO) and have bus electrodes positioned below them. The bus electrodes have a width smaller than that of the transparent electrodes and compensate for line resistance thereof. A front panel has a dielectric substance layer formed on a lower surface of the front substrate so that the transparent electrodes are embedded without being exposed and a protective layer for protecting the dielectric substance layer.
The rear substrate has address (A) electrodes positioned on its upper surface, which opposes the front substrate, while having the address electrodes direction intersecting with the transparent electrodes direction of the front substrate. The rear substrate has a dielectric substance layer formed on its upper surface so that the address electrodes are not exposed, as in the case of the front substrate. The rear substrate has barriers formed on its upper surface to maintain discharge distance and avoid electro-optical crosstalk between discharge cells. Particularly, the barriers are positioned between the front and rear substrates and delimit discharge cells, which function as places for generating discharge and which are the smallest components of pixels that are basic units for realizing images in PDPs. Fluorescent substances of red (R), green (G), and blue (B) are applied to both surfaces of the barriers, which constitute discharge cells, and to the upper surface of the dielectric substance layer of the rear substrate, which has no barrier formed thereon, to define unit pixels.
PDPs, constructed as above, adjust the number of sustain discharges in accordance with transmitted video data and realize gray scale necessary to display images. In order to express such gray scale, an Address and Display period Separated (ADS) mode is generally used wherein a field is divided into a number of sub-fields having different numbers of discharge to be driven. In the ADS mode, each sub-field is again divided into a reset period for uniformly generating discharge, an address period for selecting a discharge cell, and a sustain period for expressing gray scale in accordance with the number of discharges.
In the address period of the sub-field, address discharge is generated by the difference between an address voltage applied to address (A) electrodes positioned below discharge cells, which have been selected to generate discharge, and a ground voltage successively applied to first display (Y) electrodes. A positive address voltage is applied to those of the address electrodes, which are positioned below discharge cells that have been selected to emit light, while ground voltage is applied to other address electrodes. When display data signals of the positive address voltage are applied while scanning pulses of the ground voltage are applied, corresponding discharge cells accumulate wall discharge by means of address discharge, while other discharge cells do not. Second display (X) electrodes maintain a predetermined voltage for more efficient address discharge during the address period. The amount of address voltage necessary for address discharge affects optical efficiency, structure, and material selection of PDPs. Particularly, the larger the address voltage is, the more power is consumed. As a result, optical efficiency decreases, sputtering increases between dielectric substance layers of front and rear substrates, and movement of charged particles to adjacent discharge cells via barriers (i.e. crosstalk) increases. Therefore, it is generally advantageous to have a low address discharge initiation voltage.
In the case of a three-electrode surface-discharge mode, the distance between first display electrodes and address electrodes is large and a higher discharge voltage is necessary. In addition, initial discharge occurs in a region where both electrodes are closest to each other (i.e. near the center of discharge cells), and following discharge shifts towards a boundary region of the electrodes. The reason discharge occurs in the central region is that this region has a lower discharge initiation voltage. Once discharge is initiated, spatial charges are established and the discharge is maintained under a voltage which is lower than the discharge initiation voltage. The voltage between both electrodes gradually decreases as time elapses. After discharge is initiated, ions and electrons accumulate in the central region and the intensity of electrical fields weakens. As a result, discharge disappears from this region. In the three-electrode surface-discharge structure, first display (Y) electrodes and second display (X) electrodes are positioned behind the front substrate in parallel. Therefore, even when ion particles are accelerated by electrical fields, which are established by electrical potential applied to the first display electrodes and second display electrodes, collide with discharge gas, and generate discharge during sustain discharge, the ion particles are very unlikely to collide with the discharge gas, because they travel along a short path, which is limited to a predetermined range behind the front substrate. In addition, discharge is concentrated in a space within the discharge cells and efficiency of the plasma display panel degrades.
In an attempt to improve the three-electrode surface-discharge mode, PDPs of an opposite discharge mode have recently been developed. In the opposite discharge mode, first display electrodes and second display electrodes are formed in a space between front and rear substrates by barriers while opposing each other and having a direction which intersects with the address electrodes' direction. Since the distance between the first display electrodes and the address electrodes is smaller than in the case of the surface-discharge mode, the address voltage is lower. In addition, discharge occurs in the whole interior of discharge cells. This means that discharge space increases and discharge efficiency improves.
In the opposite discharge mode, barriers are generally formed on front and rear panels in a closed type. This increases fluorescent substance application area and improves visible ray conversion efficiency. However, the discharge distance between first display electrodes and address electrodes increases and the address voltage rises. In addition, the distance between electrodes undergoing discharge varies depending on the distance (i.e., cell pitch) between barriers on which they are formed. In the case of long-gap discharge, the voltage of sustain discharge rises.